Enhancing semiconductor device performance and increasing device density, to increase the number of devices per unit area, continue to be important objectives of the semiconductor fabrication industry. Device density is increased by making individual devices smaller and packing devices more compactly. Also, as the device dimensions (also referred to as feature size or design rules) decrease, the methods for forming devices and their constituent elements must be adapted. For instance, production line feature sizes are currently in the range of 0.25 microns to 0.18 microns, with an inexorable trend toward small dimensions. However, as the device dimensions shrink, certain manufacturing limitations arise, especially with respect to the lithographic processes. In fact, current photolithographic processes are nearing the point where they are unable to accurately manufacture devices at the required minimal sizes demanded by today's device users.
Currently most metal-oxide-semiconductor field effect transistors (MOSFETs) are formed in a lateral configuration with the current flowing parallel to the plane of the substrate or body surface in which the source and drain regions are formed. As the size of these MOSFET devices decreases to achieve increased device density, the fabrication process becomes increasingly difficult. In particular, the lithographic process for creating the channel is problematic, as the wavelength of the radiation used to delineate an image in the photolithographic pattern approaches the device dimensions. As applied to lateral MOSFETs, the channel length is approaching the point where it cannot be precisely controlled using these photolithographic techniques.
Recent advances in packing density have resulted in several variations of a vertical MOSFET. In particular, the vertical device is described in Takato, H., et al., “Impact of Surrounding Gates Transistor (SGT) for Ultra-High-Density LSI's, IEEE Transactions on Electron Devices, Volume 38(3), pp. 573-577 (1991), has been proposed as an alternative to the planar MOSFET devices. Recently, there has been described a MOSFET characterized as a vertical replacement gate transistor. See Hergenrother, et al, “The Vertical-Replacement Gate (VRG) MOSFET: A 50-nm Vertical MOSFET with Lithography-Independent Gate Length,” Technical Digest of the International Electron Devices Meeting, p. 75, 1999. Commonly owned U.S. Pat. Nos. 6,027,975 and 6,197,641, which are hereby incorporated by reference, teach certain techniques for the fabrication of vertical replacement gate (VRG) MOSFETs.
To fabricate operational circuitry on an integrated circuit (IC), it is also necessary to incorporate passive elements into the IC fabrication process. In particular, capacitors are formed as junction capacitors or thin-film capacitors. As is known, the application of a reverse bias voltage across a semiconductor junction forces the mobile carriers to move away from the junction thereby creating a depletion region. The depletion region acts as the dielectric of a parallel-plate capacitor, with the depletion width representing the distance between the plates. Thus the junction capacitance is a function of the depletion width, which is in turn a function of the applied reverse bias and the impurity concentrations in the immediate vicinity of the junction. Thin-film capacitors, which are a direct miniaturization of conventional parallel-plate capacitors, are also fabricated for use on integrated circuits. Like the discrete capacitor, the thin-film capacitor comprises two conductive layers separated by a dielectric. One type of thin-film capacitor is formed as a metal-oxide-semiconductor capacitor, having a highly doped bottom plate, silicon dioxide as the dielectric, and a metal top plate. A thin-film capacitor can also be formed with two metal layers forming the top and bottom plates, separated by a dielectric, such as silicon dioxide or silicon nitride. Silicon nitride is preferred since it offers a higher dielectric constant and can thus provide a higher capacitance per area. The metal-oxide semiconductor capacitor structure is the most common because it is readily compatible with conventional integrated circuit processing technology. The capacitance per unit area of a thin-film capacitor is equal to the ratio of the permittivity and the dielectric thickness. Although thin-film capacitors offer higher capacitance values per unit area and fewer parasitic problems, they can fail by breakdown of the dielectric when the dielectric voltage rating is exceeded.